Half Adder-
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- Half Adder is a combinational logic circuit.
- It is used for the purpose of adding two single bit numbers.
- It contains 2 inputs and 2 outputs (sum and carry).
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Half Adder Designing-
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Half adder is designed in the following steps-
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Step-01:
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Identify the input and output variables-
- Input variables = A, B (either 0 or 1)
- Output variables = S, C where S = Sum and C = Carry
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Step-02:
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Draw the truth table-
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| Inputs | Outputs | ||
| A | B | C (Carry) | S (Sum) |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
Truth Table
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Step-03:
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Draw K-maps using the above truth table and determine the simplified Boolean expressions-
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Also Read- Half Subtractor
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Step-04:
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Draw the logic diagram.
The implementation of half adder using 1 XOR gate and 1 AND gate is as shown below-
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Limitation of Half Adder-
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- Half adders have no scope of adding the carry bit resulting from the addition of previous bits.
- This is a major drawback of half adders.
- This is because real time scenarios involve adding the multiple number of bits which can not be accomplished using half adders.
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To overcome this drawback, Full Adder comes into play.
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To gain better understanding about Half Adder,
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Next Article- Full Adder
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